(주)라온우리

알림

Maximize the signal-to-noise ratio with waveform averaging

Optional firmware package for the onboard FPGA
Programmable DC offset allows unipolar signals to utilize the entire input range of the digitizer.
DBS tracks baseline fluctuations, adjusts the baseline to a user-defined target value, and suppresses pattern noise.
A frequency-selective digital filter helps reduce noise for input signals with known limited bandwidth without loss of signal information.
The non-linear advanced threshold operation with filter is a complement to the succeeding WFA, tailored for rarely occurring weak pulses.
Waveform averaging (WFA) reduces random noise via repeated measurements
Dead-time free seamless accumulation and acquisition.
Firmware updates can be done by the user via the ADQUpdater tool that is included in the SDK

Description

The Advanced Time-Domain firmware option, FWATD, equips selected digitizer models with advanced tools for sophisticated time-domain measurements. Multiple steps of noise suppression is provided in order to achieve extreme dynamic range, so that rarely occurring weak signals can be detected and distinguished from noise.

FWATD can track and correct for temperature-dependent baseline (DC level) fluctuations, which may otherwise lead to incorrect detection or even detection of false pulses. It supports several types of noise reduction for both random and systematic noise. The flexible architecture and user-defined settings enable tailored noise reduction for various applications.